<=1'b0;if((cnt_i2c_clk == 2'd2)&&(cnt_bit == 3'd7)&&(mode == 3'd6))skip_en_6<=1'b1;elseskip_en_6<=1'b0;if((cnt_i2c_clk == 2'd2)&&(cnt_bit == 3'd7)&&(mode == 3'd3)&&(rec_data != 8'h20))beginerror_en<=1'b1;mode<=3'd0;endelsebeginerror_en<=1'b0;mode<=mode;endendACK_3:begincnt_i2c_clk<=cnt_i2c_clk + 1'b1;if((cnt_i2c_clk == 2'd2)&&(mode == 3'd1)&&(ack == 1'b1))skip_en_1<=1'b1;elseskip_en_1<=1'b0;if((cnt_i2c_clk == 2'd2)&&(mode == 3'd4)&&(ack == 1'b1))skip_en_4<=1'b1;elseskip_en_4<=1'b0;endWAIT:beginif((cnt_delay == CNT_DELAY_MAX - 2'd2)&&(mode == 3'd0))skip_en_0<=1'b1;elseskip_en_0<=1'b0;cnt_delay<=cnt_delay + 1'b1;endNACK:begincnt_i2c_clk<=cnt_i2c_clk + 1'b1;if((cnt_i2c_clk == 2'd2)&&(mode == 3'd3)&&(ack == 1'b1))skip_en_3<=1'b1;elseskip_en_3<=1'b0; if((cnt_i2c_clk == 2'd2)&&(mode == 3'd6)&&(ack == 1'b1))skip_en_6<=1'b1;elseskip_en_6<=1'b0;endSTOP:begincnt_i2c_clk<=cnt_i2c_clk + 1'b1;if((cnt_i2c_clk == 2'd2)&&(mode == 3'd0))skip_en_0<=1'b1;elseskip_en_0<=1'b0;if((cnt_i2c_clk == 2'd2)&&(mode == 3'd1))skip_en_1<=1'b1;elseskip_en_1<=1'b0;if((cnt_i2c_clk == 2'd2)&&(mode == 3'd2))skip_en_2<=1'b1;elseskip_en_2<=1'b0;if((cnt_i2c_clk == 2'd2)&&(mode == 3'd3))skip_en_3<=1'b1;elseskip_en_3<=1'b0; if((cnt_i2c_clk == 2'd2)&&(mode == 3'd4))skip_en_4<=1'b1;elseskip_en_4<=1'b0;if((cnt_i2c_clk == 2'd2)&&(mode == 3'd5))skip_en_5<=1'b1;elseskip_en_5<=1'b0; if((cnt_i2c_clk == 2'd2)&&(mode == 3'd6))skip_en_6<=1'b1;elseskip_en_6<=1'b0;if(cnt_i2c_clk == 2'd2)i2c_end<=1'b1;elsei2c_end<=1'b0;if((i2c_end == 1'b1)&&(mode <= 3'd3))mode<=mode + 1'b1;elseif((mode == 3'd4)&&(i2c_end == 1'b1)&&(cfg_num == 6'd51))mode<=mode + 1'b1;elseif((i2c_end == 1'b1)&&(mode == 3'd5))mode<=mode + 1'b1;elsemode<=mode;enddefault:begincnt_wait<=10'd0;skip_en_0 <=1'b0 ;skip_en_1 <=1'b0 ;skip_en_2<=1'b0 ;skip_en_3<=1'b0 ;skip_en_4<=1'b0 ;skip_en_5<=1'b0 ;skip_en_6<=1'b0 ;error_en <=1'b0 ;cnt_i2c_clk <=2'd0 ;cnt_bit<=3'd0 ;cnt_delay <=10'd0 ;mode<=mode ;i2c_end<=1'b0 ;endendcasealways@(posedge i2c_clk or negedge sys_rst_n)if(sys_rst_n == 1'b0)rec_data<=8'd0;elsecase(c_state)DATA : if((mode == 3'd3)&&(cnt_i2c_clk == 2'd1))rec_data<={rec_data[6:0],sda_in};elserec_data<=rec_data;default : rec_data<=8'd0;endcasealways@(posedge i2c_clk or negedge sys_rst_n)if(sys_rst_n == 1'b0)po_data_reg<=8'd0;elsecase(c_state)DATA : if((mode == 3'd6)&&(cnt_i2c_clk == 2'd1))po_data_reg<={po_data_reg[6:0],sda_in};elsepo_data_reg<=po_data_reg;default : po_data_reg<=po_data_reg;endcasealways@(posedge i2c_clk or negedge sys_rst_n)if(sys_rst_n == 1'b0)po_data<=8'd0;elseif((cnt_i2c_clk == 2'd2)&&(cnt_bit == 3'd7)&&(mode == 3'd6))po_data<=po_data_reg;elsepo_data<=po_data;always@(*)case(c_state)ACK_1,ACK_2,ACK_3:ack=~sda_in;NACK:ack=i2c_sda;default : ack=1'b0;endcasealways@(*)case(c_state)IDLE: i2c_scl=1'b1;START: if(cnt_i2c_clk == 2'd3)i2c_scl=1'b0;elsei2c_scl=1'b1;SLAVE_ADDR,ACK_1,DEVICE_ADDR,ACK_2,DATA,ACK_3,NACK: if((cnt_i2c_clk == 2'd0)||(cnt_i2c_clk == 2'd3))i2c_scl=1'b0;elsei2c_scl=1'b1;WAIT: i2c_scl=1'b0;STOP: if(cnt_i2c_clk == 2'd0)i2c_scl=1'b0;elsei2c_scl=1'b1;default: i2c_scl=1'b1;endcasealways@(*)case(c_state)IDLE: i2c_sda=1'b1;START: if(cnt_i2c_clk == 2'd0)i2c_sda=1'b1;elsei2c_sda=1'b0;SLAVE_ADDR : i2c_sda=slave_addr[7 - cnt_bit];ACK_1,ACK_2,ACK_3,: i2c_sda=1'b0;NACK: i2c_sda=1'b1;DEVICE_ADDR : i2c_sda=device_addr[7 - cnt_bit];DATA: i2c_sda=wr_data[7 - cnt_bit];WAIT: i2c_sda=1'b0;STOP: if((cnt_i2c_clk == 2'd0)||(cnt_i2c_clk == 2'd1))i2c_sda<=1'b0;elsei2c_sda<=1'b1;default: i2c_sda<=1'b1;endcaseendmodule
modulepaj7620_top( input wiresys_clk,input wiresys_rst_n ,output wirescl,output reg[3:0] led,inout wiresda );wire [23:0] cfg_data ;wirei2c_start ;wire [5:0] cfg_num;wirei2c_clk;wire [2:0] mode;wirecfg_start ;wire [7:0] po_data;always@(posedge i2c_clk or negedge sys_rst_n)if(sys_rst_n == 1'b0)led